LibGuides: CISC 3310 Principles of Computer Architecture (Briskman): Topic 10: Performance & Architecture Types

Materials for Topic 10: Performance & Architecture Types

3. Performance Metrics (e-book chapter)
Citation: Parthasarathi, Ranjani. "3. Performance Metrics." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/performance-metrics/index.html
4. Summarizing Performance, Amdahl’s law and Benchmarks (e-book chapter)
Citation: Parthasarathi, Ranjani. "4. Summarizing Performance, Amdahl’s law and Benchmarks." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/summarizing-performance-amdahls-law-and-benchmarks/index.html
28. Introduction to Multiprocessors (e-book chapter)
Citation: Parthasarathi, Ranjani. "28. Introduction to Multiprocessors." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/introduction-to-multiprocessors/index.html
29. Cache Coherence 1 (e-book chapter)
Citation: Parthasarathi, Ranjani. "29. Cache Coherence 1." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/cache-coherence-i/index.html
30. Cache Coherence 2 (e-book chapter)
Citation: Parthasarathi, Ranjani. "30. Cache Coherence 2." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/312/index.html
31. Other Issues with Parallel Processors (e-book chapter)
Citation: Parthasarathi, Ranjani. "31. Other Issues with Parallel Processors." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/other-issues-with-parallel-processors/index.html
32. Exploiting Data Level Parallelism (e-book chapter)
Citation: Parthasarathi, Ranjani. "32. Exploiting Data Level Parallelism." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/exploiting-data-level-parallelism/index.html
33. Case Studies of Multicore Architectures 1 (e-book chapter)
Citation: Parthasarathi, Ranjani. "33. Case Studies of Multicore Architectures 1." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/case-studies-of-multicore-architectures-i/index.html
34. Case Studies of Multicore Architectures 2 (e-book chapter)
Citation: Parthasarathi, Ranjani. "34. Case Studies of Multicore Architectures 2." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/case-studies-of-multicore-architectures-ii/index.html
35. Warehouse-Scale Computers (e-book chapter)
Citation: Parthasarathi, Ranjani. "35. Warehouse-Scale Computers." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/warehouse-scale-computers/index.html
36. Summary and Concluding Remarks (e-book chapter)
Citation: Parthasarathi, Ranjani. "36. Summary and Concluding Remarks." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/summary-and-concluding-remarks/index.html
37. Exploiting ILP with Software Approaches 2 (e-book chapter)
Citation: Parthasarathi, Ranjani. "37. Exploiting ILP with Software Approaches 2." Computer Architecture. INFLIBNET Centre, 24 July 2018, https://www.cs.umd.edu/~meesh/411/CA-online/index.html, Accessed 30 June 2024. License: CC BY-NC: Attribution-NonCommercial.
URL: https://www.cs.umd.edu/~meesh/411/CA-online/chapter/exploiting-ilp-with-software-approaches-ii/index.html
6.4: Performance Tuning (online course unit)
Citation: “CS301: Computer Architecture | Unit 6: The Memory Hierarchy: 6.4: Performance Tuning.” Saylor Academy, 2010, learn.saylor.org/course/CS301. Accessed 30 June 2024. License: CC BY: Attribution.
URL: https://learn.saylor.org/course/view.php?id=71§ionid=15537#:~:text=6.4%3A%20Performance%20Tuning
7.3: Measuring Disk Performance (online course unit)
Citation: “CS301: Computer Architecture | Unit 7: Storage and I/O: 7.3: Measuring Disk Performance.” Saylor Academy, 2010, learn.saylor.org/course/CS301. Accessed 30 June 2024. License: CC BY: Attribution.
URL: https://learn.saylor.org/course/view.php?id=71§ionid=15543#:~:text=7.3%3A%20Measuring%20Disk%20Performance
Unit 8: Parallel Processing (online course unit)
Citation: “CS301: Computer Architecture | Unit 8: Parallel Processing.” Saylor Academy, 2010, learn.saylor.org/course/CS301. Accessed 30 June 2024. License: CC BY: Attribution.
URL: https://learn.saylor.org/course/view.php?id=71§ionid=15549
Chapter 3, Section 1, Subsection 4: CISC vs. RISC (pdf book section)
Citation: Wienand, Ian. (2019). "Chapter 3, Section 1, Subsection 4: CISC vs. RISC." Computer Science from the Bottom Up, https://www.bottomupcs.com/. License: CC BY-SA: Attribution-ShareAlike.
URL: https://www.bottomupcs.com/csbu.pdf#page=70
Chapter 9, Section 3: ARM (pdf book section)
Citation: Bergmann, Seth D. (2018). "Chapter 9, Section 3: ARM." Computer Organization with MIPS, https://rdw.rowan.edu/oer/9/. License: CC BY-NC-ND: Attribution-NonCommercial-NoDerivs.
URL: https://rdw.rowan.edu/cgi/viewcontent.cgi?article=1008&context=oer#section.9.3
Chapter 9, Section 4: Intel Pentium (pdf book section)
Citation: Bergmann, Seth D. (2018). "Chapter 9, Section 4: Intel Pentium." Computer Organization with MIPS, https://rdw.rowan.edu/oer/9/. License: CC BY-NC-ND: Attribution-NonCommercial-NoDerivs.
URL: https://rdw.rowan.edu/cgi/viewcontent.cgi?article=1008&context=oer#section.9.4
Chapter 5: Threads and Shared Memory (pdf book chapter)
Citation: Viswanath, Divakar. "Chapter 5: Threads and Shared Memory." Scientific Programming and Computer Architecture. The MIT Press, 2017, https://mitpress.mit.edu/9780262036290/scientific-programming-and-computer-architecture/. License: CC BY-NC-ND: Attribution-NonCommercial-NoDerivs.
URL: https://library.oapen.org/bitstream/handle/20.500.12657/26041/Scientific%20Programming%20and%20Computer%20Architecture.pdf#page=170
Instruction Set Architecture (online lecture webpage)
Citation: Murphy, Mike. “System Architecture | The CPU | Instruction Set Architecture.” Coastal Carolina University, 2023. Accessed 7 July 2024. License: CC BY-SA: Attribution-ShareAlike.
URL: https://ww2.coastal.edu/mmurphy2/oer/architecture/cpu/isa/

Videos on Topic 10: Performance & Architecture Types

"Computer Architecture - CPU Performance (concept)" by TeachingCS

YouTube URL: https://www.youtube.com/watch?v=p_jt0XEiOZo

Citation: "Computer Architecture - CPU Performance (concept)." YouTube, TeachingCS, 29 Jul. 2018.
URL: www.youtube.com/watch?v=p_jt0XEiOZo

"Computer Hardware and Mathematics", a Playlist by Padraic Edgington

The videos on Performance, numbers 12 to 36, are the most relevant to our topic. Videos in this playlist range from 2 mins long to 13 minutes long, but an average video is 3-4 minutes long.

YouTube URL: https://www.youtube.com/playlist?list=PL1C2GgOjAF-KjrLSFLhM6bqnAs3M8R3jO

Citation: Edgington, Padraic. "Computer Hardware and Mathematics." YouTube, 9 Jul. 2017. License: CC BY: Attribution.

URL: www.youtube.com/playlist?list=PL1C2GgOjAF-KjrLSFLhM6bqnAs3M8R3jO

"Multicore and Multiprocessors Systems" by RK Broadcast

YouTube URL: https://www.youtube.com/watch?v=dGLG5-itoOA

Citation: "Multicore and Multiprocessors Systems." YouTube, RK Broadcast, 10 May 2021. License: CC BY: Attribution.

URL: www.youtube.com/watch?v=dGLG5-itoOA

"Introduction to Parallel Programming" by John Foster

YouTube URL: https://www.youtube.com/watch?v=ZolH7v8kvI8

Citation: Foster, John. "Introduction to Parallel Programming." YouTube, 8 Nov. 2012. License: CC BY: Attribution.

URL: www.youtube.com/watch?v=ZolH7v8kvI8

"Flynn's Architecture - SISD, SIMD, MISD & MIMD" by Learn Learn Scratch Tutorials

YouTube URL: https://www.youtube.com/watch?v=KVOc6369-Lo

Citation: "Flynn's Architecture - SISD, SIMD, MISD & MIMD." YouTube, Learn Learn Scratch Tutorials, 2 Nov. 2021.
URL: www.youtube.com/watch?v=KVOc6369-Lo

"CISC vs RISC architectures" by Abelardo Pardo